Module Descriptors
DIGITAL SYSTEMS (D\L)
ELEC60235
Key Facts
Digital, Technology, Innovation and Business
Level 6
15 credits
Contact
Leader: Anas Amjad
Email: A.Amjad@staffs.ac.uk
Hours of Study
Scheduled Learning and Teaching Activities: 6
Independent Study Hours: 144
Total Learning Hours: 150
Pattern of Delivery
- Occurrence A, Stoke Campus, UG Semester 3 to UG Semester 1
- Occurrence D, Stoke Campus, UG Semester 1
- Occurrence K, Stoke Campus, UG Semester 2
Sites
- Stoke Campus
Assessment
- ASSIGNMENT weighted at 30%
- EXAMINATION - UNSEEN IN EXAMINATION CONDITIONS weighted at 70%
Module Details
Module Indicative Content
Introduction to design using VHDL
State machine and RTL design using VHDL
Design synthesis, layout, simulation and testing
CPLD and FPGA technology
State machine and RTL design using VHDL
Design synthesis, layout, simulation and testing
CPLD and FPGA technology
Module Learning Strategies
Learning on all aspects of the contents will be faciltated via a Virtual Learning Environment
Practical and analytical assignments using laboratory equipment
Problem solving and student centre learning
Practical and analytical assignments using laboratory equipment
Problem solving and student centre learning
Module Resources
Students will require access to a PC capable of running Xilinx ISE and ISim (installation rights and 6GB of hard disk space needed)
Access to Blackboard VLE and Email
Access to copy of textbook(s)
Recommended text is available as hardcopy and electronically via ATHENS.
Access to Blackboard VLE and Email
Access to copy of textbook(s)
Recommended text is available as hardcopy and electronically via ATHENS.
Module Special Admissions Requirements
CESENGD20083-5 Introduction to Digital Systems (D/L) or equivalent.
Module Texts
Digital Systems Design with FPGAs and CPLDs, Grout. Ian., Amsterdam: Elsevier/Newnes, 2008 - xxxvii, 724p.:ill.; 25cm
ISBN: 075068397X / 9780750683975
Digital Electronics and Design with VHDL (electronic resource), Pedroni, Volnei, A.
Format: electronic available online
Publisher: San Francisco, Calif.: Oxford: Morgan Kaufmann; Elsevier Science (distributor), 2008
(Electronic copies available from library via ATHENS)
ISBN: 075068397X / 9780750683975
Digital Electronics and Design with VHDL (electronic resource), Pedroni, Volnei, A.
Format: electronic available online
Publisher: San Francisco, Calif.: Oxford: Morgan Kaufmann; Elsevier Science (distributor), 2008
(Electronic copies available from library via ATHENS)
Module Additional Assessment Details
An assignment weighted at 30% - to assess learning outcomes 1, 2 and 3
An end exam (unseen) weighted at 70%. - to assess learning outcomes 1, 2 and 3
An end exam (unseen) weighted at 70%. - to assess learning outcomes 1, 2 and 3