This module will enable students to gain understanding, apply knowledge, analyse and evaluate problems and create solutions through a variety of activities, including problem-based lectures, tutorials, laboratories and independent study.
¿ Learning on all aspects of the indicative content will be facilitated by classroom based lectures, tutorials, laboratory based practical experimental.
¿ Independent study: reading, team work activities, information gathering, presentations, student centred learning, assignment preparation.

Prior study of Digital Design 1 or equivalent

This module covers a wide range of advanced digital design techniques which can be used for a variety of applications. Mealy and Moore sequential circuit design process will be discussed in detail. The module will also provide deep understanding of sequential circuit timing issues that must be considered during the design process. Programmable Logic Devices such as SPLDs, CPLDs, FPGAs etc will also be discussed. This module will enable you to use a Hardware Description Language for digital logic design and advanced simulation.

Roth Jr, C. H., & John, L. K. (2018) Digital Systems Design Using VHDL. Cengage Learning.
LaMeres, B. J. (2019) Introduction to Logic Circuits & Logic Design with VHDL. Springer.
Grout, I. (2011) Digital systems design with FPGAs and CPLDs. Elsevier.
Floyd, T. L. (2015) Digital Fundamentals: Pearson New International Edition: A Systems Approach. Pearson.

Software tools to simulate and analyse HDL designs
Library resources and ebooks.
Use of Lynda.com
Learning material will be made available on Blackboard VLE

1. Design complex digital electronic circuits independently using a variety of new advanced techniques. (AHEP 3: SM2b)

2. Implement using software/hardware tools and interpret/analyse simulation and present the results. (AHEP 3: SM1b, EA1b, EA2, EA4b, P6, G1)

3. Demonstrate critical awareness and ability to evaluate current research, contemporary problems, and new insights in the area of digital system design. (AHEP 3: SM1b, EA1b,P4, P6, G1)

4. Apply and extend appropriate methodologies and techniques applicable to digital system design. (AHEP 3:SM2b, EA1b, EA2)

A REPORT length 1,500 WORDS weighted at 50%, which will assess Learning Outcomes 2 and 3. Meeting AHEP 3 Outcomes SM1b, EA1b, EA2, EA4b, P4, P6, G1.

An EXAM length 1.5 HOURS weighted at 50%, which will assess Learning Outcomes 1 and 4. Meeting AHEP 3 Outcomes SM2b, EA1b, EA2.